发明名称 DATA PROCESSOR
摘要 PURPOSE:To shorten the processing time of a data processor by providing two microprogram memories to divide a microprogram into even and odd addresses and store them respectively. CONSTITUTION:The contents of even addresses and odd addresses of a microprograms are stored in the microprogram memories 4 and 5 respectively. The microprogram addresses set on an address bus a are held by an address register 3. The AND gates 9 and 10 form an address selecting circuit. Then the microprogram address on the bus 1 is outputted to the memory 4 when a microprogram memory control signal 2 is equal to '0'. While the microprogram address held by the register 3 is outputted to the memory 4 when the signal 25 is equal to '1' respectively. AND gates 11 and 12 form a data selecting circuit. Then the read data of the memory 4 or 5 is outputted to a data bus 8 via a data register 6 in accordance with an even or odd address.
申请公布号 JPS62168235(A) 申请公布日期 1987.07.24
申请号 JP19860010429 申请日期 1986.01.20
申请人 NEC CORP 发明人 SEKIGUCHI AKIRA
分类号 G06F9/28;G06F9/22 主分类号 G06F9/28
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