发明名称 BUS CONTROL SYSTEM
摘要 PURPOSE:To improve the DMA system efficiency by mixing in a prescribed ratio both the bus conflict control which acquires the bus use right after stopping a processor and the bus conflict control which acquires bus use right after the end of a processor cycle. CONSTITUTION:A bus conflict means 15 allows the use of a bus to an input/ output device when a bus use request is received from the input/output device and at the same time outputs a stop request to a processor to confirm the unused state of the processor when a start signal is outputted from the input/ output device for use of the bus. While a bus conflict means 16 confirms the unused state of the processor when a start signal is outputted from the input/ output device and allows the use of bus to the input/output device. Both means 15 and 16 are switched by a switching means 14 in a prescribed ratio for execution of the conflict control.
申请公布号 JPS62168254(A) 申请公布日期 1987.07.24
申请号 JP19860009546 申请日期 1986.01.20
申请人 FUJITSU LTD 发明人 KISHINO TAKUMI;HASHIMOTO SHIGERU
分类号 G06F13/30;G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/30
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