| 摘要 |
PURPOSE:To reduce the area of a chip by widening the areas of wiring regions from both ends toward the center to vary the area of each wiring region so that the wiring densities of the regions become substantially equal. CONSTITUTION:In a semiconductor device of a gate array structure having a plurality of transistor regions 2, and wiring regions 3 provided between the transistor regions for wiring between the transistors of the transistor regions, the width of the regions 3 near the center of a chip 1 is (c), which is larger than the width (b) of the wiring regions 3 of the periphery. Thus, since the wiring regions near the center having many wirings is widely formed, the wirings can be executed with margin. Accordingly, the wirings can be ready, and since the wiring regions of the periphery having less wirings are reduced in the area correspondingly, the area of the entire chip can be reduced. |
