发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To optimize a capacity value necessary for each cell by sharing the noise preventing capacity of reference level generated from a reference level generator in each cell to be arranged. CONSTITUTION:A noise preventing capacity 22 is provided near a noise preventing noise limiter resistor 25 of a vertical stack gates of each cell 21, and the capacitor 22 is connected with a reference level signal Vref from a reference level generator 23. The generator 23 has transistors T01, T02 connected in series between power sources VCC and VEE, and a transistor T03 having a base common to the transistor T02 and connected at its collector with the base of the transistor T01, and the capacity 22 is connected between the collector of the transistor T02 and the power source VCC. The capacity 22 operates to accelerate a current switching operation by suppressing the variation in the reference level signal.
申请公布号 JPS62166543(A) 申请公布日期 1987.07.23
申请号 JP19860008393 申请日期 1986.01.18
申请人 FUJITSU LTD 发明人 SUGIYAMA EIJI;KADOI HIROYUKI;NAKANOWATARI CHIKAHIRO
分类号 H01L27/082;H01L21/82;H01L21/8222;H01L27/06;H01L27/118;H03K19/08;H03K19/086 主分类号 H01L27/082
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