发明名称 |
SYNCHRONIZATION TYPE COUNTER CIRCUIT |
摘要 |
PURPOSE:To simplify the constitution of a circuit and to attain synchronous counting by constituting a carry signal generating circuit in counter unit of an AND generating circuit for generating AND between a common carry signal and a carry permission signal generated from a successive carry permission signal generating circuit. CONSTITUTION:A NAND circuit NANDn1 generates the inversional signal of a carry signal for the n-th stage on the basis of a common carry signal CCM and a carry permission signal Cn-1 generated from the prestage circuit. The inversional signal and an inversional output signal from a DFFn are inputted to an exclusive OR circuit EORN and the output of the EORN is inputted to a DFFn to constitute a unit constituting circuit of a counter. A NAND circuit NANDn2 and an inverter INVn inputting the output of the NANDn2 generate an AND signal Cn between the signal Cn-1 and the forward output of the DFFn, i.e. the n-th stage carry permission signal. A multistage circuit is constituted by using such unit constitution, so that a synchronizing counter with a simple circuit constitution can be formed.
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申请公布号 |
JPS62165433(A) |
申请公布日期 |
1987.07.22 |
申请号 |
JP19860008222 |
申请日期 |
1986.01.17 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TOMITA HARUMASA;KYOGOKU TERUHIKO |
分类号 |
H03K23/00;H03K23/40;H03K23/50 |
主分类号 |
H03K23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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