发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To simplify the design and circuit constitution and to miniaturize the chip area by giving a prescribed potential to a gate of a barrier FET and connecting a restore circuit directly to a bit line pair. CONSTITUTION:The restore circuit 1 is connected directly to bit line pairs BL the inverse of BL and a prescribed potential, E.g., a VCC is fed to a gate of barrier FETs T1, T2. The gate potential VCC of the FETs T1, T2 at precharging is higher than a threshold value VT, the FETs T1, T2 are turned on and the bit line precharge by the precharge circuit is applied. At read of the memory cell data, when a control signal phi1 goes to H and the sense operation of the potential difference caused at the bit line pairs is applied by the sense amplifier 2. Then the circuit 1 is operated to restore the bit lines.
申请公布号 JPS62165787(A) 申请公布日期 1987.07.22
申请号 JP19860007271 申请日期 1986.01.17
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 OKADA YOSHIO;FUJII HIDEMASA;OGIWARA MASAKI
分类号 G11C11/409;G11C11/4094 主分类号 G11C11/409
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