发明名称 TEST EQUIPMENT OF INTERFACE CIRCUIT OF DATA COMMUNICATION EQUIPMENT
摘要 PURPOSE:To execute the test simply by allowing a communication equipment side to confirm the return of a prescribed BUSY signal and an ACKNOWLEDGE signal from a test equipment to the transmission of a DATA and a DATA STROBE signal from the communication equipment. CONSTITUTION:Eight bits of D0-D7 constituting a DATA (A) are ANDed by an eight input AND circuit 4, and this output and a DATA STROBE (B) are ANDed by an AND circuit 5. The output of the AND circuit 5 is subject to time delya by a delay circuit 6, and inputted to a pulse generating circuit 7 and outputted as a BUSY (C). The output of the pulse generating circuit 7 is inputted to a delay circuit 8, where it is subject to time delay and the result is inputted to a pulse generating circuit 9, from which a pulse is generated. The transmission side checks the normality or error by having onlt to transmit all ''1'' and all ''0'' of the data (A) once to decide the propriety of an interface circuit instantly.
申请公布号 JPS6057746(A) 申请公布日期 1985.04.03
申请号 JP19830164239 申请日期 1983.09.08
申请人 HITACHI SEISAKUSHO KK 发明人 SHIMAMOTO SEIJI;YOSHIDA TOSHIHIRO
分类号 H04L29/14;H04L12/26 主分类号 H04L29/14
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