| 摘要 |
PURPOSE:To attain the display of an optional hatching pattern by providing a control circuit which outputs the write signal of the hatching pattern to be stored from a logic circuit to a frame memory. CONSTITUTION:A control circuit 21 provided in a CPU2 gives a command signal 11 for the smear out of an optional area to a CRT controller 1 even when a hatching display is performed, and the CRT controller 1 outputs a frame memory write address signal 23 for a smear out display, and a smear out data signal 22. A logic circuit 6 forms a write data signal 26 to a frame memory 3 by taking a logical product between the smear out data signal 22 and display pattern data signals 24 and 25, and writes it on the frame memory 3. At such a time, an optional hatching pattern data is written on an X direction hatching pattern storage part 4 and a Y direction hatching pattern storage part 5. In this way, the optional hatching pattern can be displayed. |
