发明名称 ACCESS CONTROL SYSTEM FOR DOT MEMORY
摘要 PURPOSE:To reduce the possibility that writing into a dot memory conflicts with reading from the dot memory, by providing memory request control flags in the dot memory on a line basis or a raster basis, in a printer controller. CONSTITUTION:When a command for starting reading is outputted from a raster-controlling circuit 111 to a memory request control flag bit reading circuit 112, a request for reading is outputted to a full bit memory 100 through an OR circuit 114, an address is outputted to a memory bus 120, and a detecting command is outputted to a memory request control flag bit detecting circuit 113. When a memory request control flag bit on the bus 120 is '0', the detecting circuit 113 outputs a command for starting reading, and a memory request controlling circuit 115 reads dot data from the memory 100 according to a reading command from a dot data output controlling circuit 116. When the control flag bit is '1', a command for outputting dot data is not outputted. Accordingly, the possibility of conflict of writing with reading is reduced, and high-speed printing control can be performed.
申请公布号 JPS62164548(A) 申请公布日期 1987.07.21
申请号 JP19860004964 申请日期 1986.01.16
申请人 HITACHI LTD;HITACHI COMPUT ENG CORP LTD 发明人 TAKEZAWA YASUHITO;TANIGAKI HIROSHI;SUZUKI KENJI
分类号 H04N1/387;B41J2/485;G06F3/12;G06K15/00;H04N1/21;H04N1/40 主分类号 H04N1/387
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