| 摘要 |
PURPOSE:To reduce the quantity of hardware by producing for each byte vertical parity data limited by each track pair and gradient parity data secured for each track pair. CONSTITUTION:The data on a pair A received from an information source 1 is sent to a modulator 7 through a data selecting circuit 6 as well as to a positive gradient parity coder 2 of the pair A, a vertical parity coder 3 of the pair A, and a negative gradient parity coder 4 of a pair B respectively. While the data on the pair B received from the source 1 is sent to the modulator 6 via the circuit 6 as well as to the coders 2 and 4 and a vertical parity coder 5 of the pair B respectively. The parity data produced by those coders 2-5 are sent to the modulator 7 via the circuit 6. While the coders 2-5 process those data for each byte. Thus it is possible to code redundant data with high efficiency without buffering data and therefore to reduce the quantity of hardware.
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