SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE:To secure the same access time to each memory cell and also to increase the access speed by reducing the level of the reading reference voltage at the same rate as that of a word line and in response to the bit position of the memory cell. CONSTITUTION:The switching transistors Qs and Qs are turned on and off by the selection signal of a Y decoder equal to that of column switches Qy and Qy. These transistors Qs and Qs are connected to wirings CL1 and CL2 which are common to those columns having the same resistance as that of a word line W. Thus the reference voltage supplied from emitter-follower transistors QW4 and QW5 are dropped by the resistances of currents I4 and I5 and wirings CL1 and CL2. Then the reference voltage dropped at the same rate as that of the word line W is supplied to the base of reference transistors Q3 and Q4. Thus the same access time is secured for each memory regardless of the bit position of a memory cell MC. This enables high-speed access of a semiconductor memory device.