发明名称 TRI-STATE OUTPUT BUFFER
摘要 PURPOSE:To connect a tri-state output buffer without any error by connecting a gate terminal of an N-channel transistor (TR) to ground via a high resistor and connecting a gate terminal of a P-channel TR to a power supply via a high resistor. CONSTITUTION:The high resistor 7 is connected between the gate terminal of the P-channel TR 5 and a power supply terminal 9 and the high resistor 8 is connected between the gate terminal of the N-channel TR 6 and ground. Since the high resistor 8 is inserted and the gate terminal of the N-channel TR 11 is connected to ground, the TR 11 is turned off and no large current flows. Similarly, the TR 12 is turned off and the TR 13 is turned on, a power supply is impressed to the terminal 14, and the terminal 15 is not connected to ground, since the gate potential of the TR 10 goes to a power voltage, then the TR 10 is turned off. Thus, no error is produced in the tri-state output buffer.
申请公布号 JPS62161215(A) 申请公布日期 1987.07.17
申请号 JP19860003919 申请日期 1986.01.10
申请人 NEC CORP 发明人 SHIOTANI SUMIO
分类号 H03K19/0175;H03K19/094;H03K19/0948 主分类号 H03K19/0175
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