发明名称 MULTIPROCESSOR
摘要 <p>PURPOSE:To effectively use an individual input bus by using a section, where all of unit signal processors in processor groups do not take in moving picture signals, to transmit control information. CONSTITUTION:A host computer 1 generates the discrimination number of a processor group of the transmission destination and discrimination numbers of unit signal processors 5-8 in processor groups 2-4 besides a control command and stores them in storage areas in processor groups. The section where all unit signal processors do not take in the moving picture signals exists certainly in one frame period though unit signal processors 5-8 in processor groups 2-4 take in the moving picture signals from an individual input bus 9, and control information is transmitted through the individual input bus 9 in this section.</p>
申请公布号 JPS62160562(A) 申请公布日期 1987.07.16
申请号 JP19860002445 申请日期 1986.01.09
申请人 NEC CORP 发明人 TAMIYA ICHIRO
分类号 G06F15/16;G06F15/177;G06F15/80 主分类号 G06F15/16
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