发明名称 LOGIC CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To independently test logic blocks by setting mutual connection signal state between logic blocks to be tested and the logic blocks except the blocks to be tested by scan registers in the blocks except the blocks to be tested. CONSTITUTION:Two logic blocks 1a, 1b form a scan register. Selectors 12, 13, 14, 15 are added to the blocks 1a, 1b. When the block 1a is tested, data is scanned in the scan register by a storage circuit 3b in the block 1b to apply the output of the scan register through a connecting signal line 7b instead of input data from the block 1b to the block 1a through a mutual connection signal line 8b. When the block 1b is tested, the scan register in the block 1b is used to be similarly tested. Thus, the blocks 1a, 1b can be independently tested.
申请公布号 JPS62159455(A) 申请公布日期 1987.07.15
申请号 JP19860002569 申请日期 1986.01.08
申请人 NEC CORP 发明人 OUCHI YASUNORI
分类号 H01L21/822;H01L21/66;H01L27/04 主分类号 H01L21/822
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