发明名称 AUTOMATIC LOGIC DESIGNING SYSTEM
摘要 PURPOSE:To attain the automatic logic designing and to decrease the designing processes at the logic designing stage, by detecting an area requiring the fault detecting logic based on the descriptions about the data structure and a logical action. CONSTITUTION:The data structure is described in terms of the logic elements such as the registers, memories, input/output signals, etc. which are contained in a digital logical system. These logical elements are analyzed and the results of these analyses are stored in a logical element table 12. While the operation is described in terms of the transfer of data carried out between logical elements. Then the results of analyses are stored in a transfer operation table 13. A fault detection data producing part 11 retrieves both tables 12 and 13 to detect an area requiring the production logic for fault detection data (parity bit). Then the standard pattern of the parity bit production logic to be stored in a library 14 is read out and controlled to be fitted to the area requiring said production logic. Thus the parity bit production logic is secured.
申请公布号 JPS62159277(A) 申请公布日期 1987.07.15
申请号 JP19860000567 申请日期 1986.01.08
申请人 HITACHI LTD 发明人 SHIMIZU TSUGUO;NISHIDA TAKAO
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址