| 摘要 |
<p>PURPOSE:To obtain a self-oscillation/synchronizing oscillation circuit suitable for circuit integration by adopting the constitution that the self-oscillation and synchronizing oscillation are switched depending on the presence of a synchronizing pulse so as to decrease number of input terminals and capacitors. CONSTITUTION:Since no synchronizing pulse is impressed to a flip-flop FF at the self-oscillation mode, a transistor (TR) Q3 is turned off, a TR Q2 is turned on and a capacitor CT is charged through a resistor R3 and the TR Q2. When the charging voltage exceeds a reference voltage at a node 6, a comparator COMP1 outputs a high level, a TR QT is turned on and the capacitor CT is discharged. When the synchronizing pulse is inputted in the synchronizing oscillation mode, a Q output of the FF cause a high level, the TR Q1 is turned on to discharge a residual electric charge of the capacitor CT/ When the Q output of the FF is at a high level, the TR Q3 is turned on, the TR Q2 is turned off and the capacitor is charged through resistors R3, R4. When the charging voltage exceeds the reference voltage, the output of the COMP1 goes to a high level, but an AND gate AND 2 prevents the TR QT from being turned on. When the next synchronizing pulse is applied, the similar operation is repeated and the synchronizing oscillation output is obtained.</p> |
