发明名称 LOGIC ARITHMETIC CIRCUIT
摘要 PURPOSE:To attain the logic arithmetic operations for each bit by providing the logic arithmetic parts in response to each partial bit of the 1st and 2nd input data, and producing the arithmetic control data based on the 3rd input data to supply the control data to each logic arithmetic part. CONSTITUTION:A logic arithmetic part 11 contains four logic arithmetic parts in parallel and every 2 bits and feeds the logic arithmetic to the incoming input data D1 and D2 every two bits. then the part 11 synthesizes the result data obtained every two bits to output the output data D0 of 8 bits, then carries out the logic arithmetic operation indicated by the arithmetic control data CTRL supplied from an arithmetic control data producing part 12. The part 12 receives the input data D3 to divide it every two bits and sets and outputs forcibly the arithmetic information to an EX-OR with said two bits set at 1/1, to an AND with bits 1/0, to an OR with bits 0/1, and to 0/0 with bits 0/0 respectively through logic arithmetic operation.
申请公布号 JPS62156733(A) 申请公布日期 1987.07.11
申请号 JP19850297001 申请日期 1985.12.28
申请人 TOSHIBA CORP 发明人 OTSUBO SHUJI
分类号 G06F7/38 主分类号 G06F7/38
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