| 摘要 |
PURPOSE:To execute efficiently a detection of a power source line short circuit part by referring to arrangement graphic information of a subcontractor and a well-contractor of a power source line in a CMOS integrated circuit, and extracting an arrangement point in the vicinity of a short circuit part between two electric wires of a power source potential line and a reference potential line. CONSTITUTION:The first arrangement graphic information signal 104 and the second arrangement graphic information signal 105 are inputted to a graphic AND device 2, and in the graphic AND device 2, the fifth arrangement graphic information signal 108 for showing an arrangement of a power source line corresponding to graphic AND of a power source potential line and a reference potential line is outputted, and inputted to a short circuit part detector 3. In the short circuit part detector 3, the third arrangement graphic information signal 106 which is sent from an arrangement graphic information comparison separator 1 and the fourth arrangement graphic information signal 107, and the fifth arrangement graphic information signal 108 which is sent from the graphic AND device 2, these three arrangement graphic signals are processed, and a contact and an intersection between both potential lines of the power source potential line and the reference potential line, or wrong riveting of a subcontractor and a well-contractor is detected.
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