| 摘要 |
PURPOSE:To contrive improvement in the efficiency of an integrated circuit by a method wherein the boundary, to be used for split drawing of an integrated circuit pattern, is selected and registered in advance as the proposed boundary for patterning field, and the size of the patterning field is variably set in accordance with said proposed boundary, and a patterning operation is performed. CONSTITUTION:The proposed position of the patterning field boundary to be set in the fundamental part of a repetitive pattern is selected using the graphic operation function in the system, and the determined proposed position of the patterning field boundary is indicated by a one-dot chain line 21. The setting of the patterning field is performed within the range of a data drawing-up program, to be used for an electron beam exposure device, in such a manner that the following two conditions are satisfied. They are the size of patterning field is set at the value of integral number times and one of the patterning field boundaries is set at the position of the patterning field boundary. A resist process is proceeded by the prepared data for the electron beam exposure device and the electron beam exposure device, and a semiconductor integrated circuit memory is formed. The patterning field provided as above-mentioned is indicated in the diagrams (a) and (b).
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