| 摘要 |
PURPOSE:To improve a transmission delay time to be generated at the connection of a load by connecting the collector and emitter of a transistor (TR) to an output terminal of a CCNTL circuit and a level adjusting resistor and connecting the base of the TR to the emitter of an input TR. CONSTITUTION:A semiconductor integrated circuit device is adjusted to a CML level by TRs Q1, Q2 to be input TRs, a TR Q5 to be a constant current source, a TR Q4 to be an output TR, and the level adjusting resistor R4. A speed-up capacitor C is also connected. The collector and emitter of a TR Q6 are connected to the emitter of the output TR Q4 to be an emitter follower and the resistor R4 respectively and the base of the TR Q6 is connected to the emitters of the input TRs Q1, Q2. Since the TR Q6 drawing current is connected to the emitter of the TR Q4 to be the emitter follower, a switching speed is not dropped even if the wiring capacity of a load is increased.
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