| 摘要 |
PURPOSE:To obtain an interruption processing circuit that can be applied to a printer, etc. without deteriorating general-purpose properties even in case the circuit is totally integrated onto one chip, by performing the interruption processing after designating the priority through a CPU in response to an interruption request given from an I/O circuit. CONSTITUTION:A CPU 11 outputs interruption priority data on I/O circuits 12 and 13 to a register 14. For instance, priority data on '1' is set to the register 14 and therefore the priority of the circuit 12 is set at a higher position. While the higher priority is given to the circuit 13 when priority data on '0' is set to the register 14. Under such conditions, a selector 15 switches the input terminals B1-B3 so that these input terminals output through output terminals Y1-Y3 in accordance with the contents of data set to the register 14. An equivalent circuit inputs an interruption signal IEI to the circuit 12 and then the signal IEI is inputted to the circuit 13 after the interruption processing of the CPU 11 is through in response to the interruption request of the circuit 12. This means that the CPU 11 inhibits the interruption request given from the circuit 13.
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