| 摘要 |
PURPOSE:To eliminate an error detection of a discriminating gap pattern by a gap pattern detector of a 2/7 encoding demodulating circuit, by providing a data securing circuit for masking up to a rise of a gap between detecting signal from the gap pattern detector, after having read an input data by a code converting part of a demodulating circuit. CONSTITUTION:A 2/7 code which has been written in a recording medium is read out by an external 2FRD clock by providing a read data gate RDGT, and thereafter, a gap pattern detecting signal GAPDT is detected by a clock VFOCL which has synchronized with a data on a medium, by a gap pattern detector. Until a rise of this signal, the read data gate RDGT and a lock data LDATA are set, and from its result, a period in which a read data enable RDENB is generated is set, and it becomes a range in which a data is not secured. Accordingly, by masking and eliminating this part, the data is secured after the gap pattern detecting signal GAPDT, therefore, an error detection of a head sync byte SB of an identification code ID is eliminated.
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