发明名称 Gate array.
摘要 <p>An integrated circuit device having a chip comprises : cell arrays consisting of a plurality of cells, the cells comprising impurity introduction regions (l5, l7) respectively, and conductive lines (VSS, VDD) selectively formed between the cell arrays and embedded in the substrate together with the cell array ; the embedded conductive lines (VSS, VDD) being selectively connected to the impurity introduction regions (l5, l7), and an insulating layer being formed on the embedded conductive lines, and wiring (l8) selectively connecting a plurality of cells being formed on the insulating layer.</p>
申请公布号 EP0228320(A1) 申请公布日期 1987.07.08
申请号 EP19860402558 申请日期 1986.11.19
申请人 FUJITSU LIMITED 发明人 TANIZAWA, TETSU
分类号 H01L21/822;H01L21/3205;H01L21/76;H01L21/82;H01L21/8238;H01L23/52;H01L23/535;H01L27/00;H01L27/04;H01L27/092;H01L27/118;(IPC1-7):H01L27/02 主分类号 H01L21/822
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