| 摘要 |
PURPOSE:To reduce the hardware quantity without using an arithmetic circuit to an exponential part and to improve the circuit function, by applying the arithmetic processing to the data on the exponential part of a floating point and at the same time holding the data on the mantissa part. CONSTITUTION:The data on the mantissa parts of A and B undergo subtraction 2 respectively and the output of this subtraction is selected by a selection signal (a) through a multiplexer 5 and stored in a register 6 as the data on the exponential part. Then an arithmetic logic circuit 1 gives arithmetic operations to the data X and Y on the mantissa parts of the input data A and B based on the result of said subtraction. The result of said arithmetic operation is selected by the signal (a) through a multiplexer 4 and stored in the register 6 as the data on the mantissa part. As a result, the result of an arithmetic operation carried out with the value of A, i.e., another input data is stored in the register 6 against the mantissa part of the input B, i.e., the data on a floating point. In this case, the data on the mantissa part remains with no change. |
