发明名称 PROTECTION CIRCUIT OF C-MOS LSI
摘要 PURPOSE:To obtain a circuit just suited to protection and alleviation for application of excessive voltage effective for LSI with high packing density without using the similar complementary elements as a pair by connecting in parallel the non-complementary or semi-complementary diode and MOSFET in parallel to the signal input between the power supply and ground line. CONSTITUTION:As the protection circuit of CMOS LSI, the clamp diode and CMOS FET are used by connecting in parallel to the signal input line IN between the power supply line VDD or ground line VSS. Moreover, the clamp diode and field MOS FET are used by connecting in parallel to the signal line IN between the power supply line VDD or grounding line VSS. Moreover, the active MOS FET and field MOS FET are used by connecting in parallel to the signal line IN between the power supply line VDD or grounding line VSS. The similar elements of complementary type are not used as a pair and the circuit just suited to high integration density and application of excessive voltage can be obtained.
申请公布号 JPS62152155(A) 申请公布日期 1987.07.07
申请号 JP19850296563 申请日期 1985.12.25
申请人 SEIKO EPSON CORP 发明人 IWAMATSU SEIICHI
分类号 H01L21/8238;H01L27/02;H01L27/06;H01L27/092 主分类号 H01L21/8238
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