发明名称 MEMORY ADDRESS TRACING SYSTEM
摘要 PURPOSE:To easily debug a software by tracing including an operand address and displaying the presence or absence of the operand address by a flat bit when there is the operand address in an instruction by an instruction fetching address. CONSTITUTION:When there is an operand address in an instruction by an instruction fetching address, a flag bit 3a is set, and the instruction fetching address is accommodated in a stack memory 2 for an instruction fetching address. Into the address of a stack memory 3 for the operand address corresponding to the stack memory address to accommodate the instruction fetching address, the operand address is accommodated. Namely, the presence or absence of the operand address can be displayed by the flag bit 3a. Thus, it can be identified easily and without fail whether or not there is the aperand in the instruction, and debugging can be facilitated.
申请公布号 JPS62151947(A) 申请公布日期 1987.07.06
申请号 JP19850290854 申请日期 1985.12.25
申请人 FUJITSU LTD 发明人 OSADA SATOSHI;FUJIHIRA ATSUSHI;KOSUGE TAKAHARU
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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