发明名称 INSTRUCTION PROCESSING SYSTEM
摘要 PURPOSE:To execute both softwares for the slave type of a machine and the host type of the machine by being provided with a function to execute the instruction set of the slave type of the machine and a function to execute the instruction set of the higher type of the machine. CONSTITUTION:A single chip microcomputer 101 is provided with both the function emulation function to execute the instruction set of a slave type of a machine and the function to execute an inherent instruction set. In the microcomputer 101, a CPU 102, an input output device 103, a code converting memory 104 and an instruction code selector 105 are included. In a code converting memory 104, a code converting table to convert the instruction code of the salve type of the machine to the instruction code of the host type of the machine is contained. An instruction code selector 104 selects whether the code is the instruction code on an internal data bus 111 or the instruction code in the code converting memory 104 and sends the result to CPU 102. In a memory 106, the program which the single chip microcomputer 101 executes by a native mode, the program which the microcomputer executes by an emulation mode and processing data are contained.
申请公布号 JPS62151938(A) 申请公布日期 1987.07.06
申请号 JP19850294280 申请日期 1985.12.25
申请人 NEC CORP 发明人 MISAWA YUKARI;KATORI SHIGETATSU
分类号 G06F9/30;G06F9/44;G06F9/455 主分类号 G06F9/30
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