发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the information amount for forming a reticle and to shorten the process of a mask ROM by introducing an impurity with a mask that has a pattern formed of sides perpendicular to or parallel to the data wirings or word wirings. CONSTITUTION:The gate electrode 5 of an MISFETQm which forms a memory cell is composed at acute angle theta1 or obtuse angle theta2 with respect to word wirings 5A, data wirings 9A, source wirings 9B. After data wirings 9A and source wirings 9B are formed, an impurity 10 is introduced with a mask 11 having a square hole 11A to control the threshold voltage of the MISFETQm through an interlayer insulating film 7, a gate electrode 5 and a gate insulating film 4. The sides of the hole 11A are formed parallel to or perpendicular to word wirings 5A (X-axis), data wirings 9A (Y-axis) or source wirings 9B (Y-axis). Thus, since information quantity in the form of a reticle is less, an art work processing time can be shortened.
申请公布号 JPS62150878(A) 申请公布日期 1987.07.04
申请号 JP19850290672 申请日期 1985.12.25
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD 发明人 MATSUMOTO YOICHI;SHIBATA TAKASHI;UEKUSA SHINYA
分类号 H01L21/8246;H01L27/10;H01L27/112;H01L29/78 主分类号 H01L21/8246
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