发明名称
摘要 PURPOSE:To increase the logic cmplitude and the degree of wiring freedom by disposing common emitter-bias wirings substantially in parallel with and adjacent to injector wirings. CONSTITUTION:An integrated circuit device has I<2>L elements E1-E12. The I<2>L elements E1 and E2, E3 and E4, E5 and E6 form pairs, which are arranged in one row. Injector wirings I run across the centers of the respective pairs. The emitter region of a leteral P-N-p transistor is connected as a hole injection source of the respective elements to the injector wirings I. I<2>L elements E7-E12 are similarly connected to the injector wirings I. Bias wirings B are disposed in parallel with and adjacent to the two wirings I. The emitter region of the upward N-P-N transistor of each element is connected to the bias wiring B.
申请公布号 JPS6230707(B2) 申请公布日期 1987.07.03
申请号 JP19810148769 申请日期 1981.09.22
申请人 FUJITSU LTD 发明人 FUJEDA FUMI
分类号 H01L27/082;H01L21/8226;H01L27/02 主分类号 H01L27/082
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