| 摘要 |
PURPOSE:To reduce the switching time, to raise the operating frequency and to achieve an improvement of controllable current, by setting up a highly- concentrated p-type impurity layer for the gate contact, in the vicinity of the highest impurity concentration area in a p-base area. CONSTITUTION:A p-type impurity is thermomigrated to both sides of an n-type semiconductor substrate to form a p-emitter layer 1 and a p-base layer 3 on both sides, between which an n-base layer 2 is formed, and the p-type impurity is then diffused to form a highly-concentrated p-type impurity layer 10 on the surface of the highly-concentrated p-base layer 3. In this case, no highly- concentrated p-type impurity layer is to exist in an area equivalent to right under the center of a cathode 8 which is to be finally made. A lowly- concentrated p-base layer 4 is then formed on both surfaces of the p-base layer 3 and highly-concentrated p-type impurity layer 10, onto which an n-type impurity is further diffused to form an n-emitter layer 5. The highly-concentrated impurity layer 10 is then partly exposed, on the surface of which a gate electrode 7 is to be set; the cathode 8 on the n-emitter layer 5; and an anode 9 on the p-emitter layer 1, respectively. |
