发明名称 PHASE DETECTING CIRCUIT
摘要 PURPOSE:To prevent a phase error from being increased by changing over received signals to/from constant frequency signals in accordance with received signal levels for inputting to a phase difference/voltage converting circuit. CONSTITUTION:Since, when received signals VI1 and VI2 are absent or smaller than a reference level VR, no level detecting signal is outputted, a switch control signal connects switch circuits 5a and 5b to a signal generating circuit 4 for outputting constant frequency signals with sine waves. Since the same signals are inputted to a phase difference/voltage converting circuit 6 accordingly, a phase signal V0 with zero phase difference is outputted. Then, when the level of the received signals is raised to exceed a level VR, a level detecting signal is outputted and the switch control signal connects the circuits 5a and 5b to the received signals from amplifiers 1a and 1b, respectively. These two groups of the received signals are inputted to the circuit 6 and the phase signal V0 with a voltage corresponding to the phase difference between the two groups of the received signals is outputted. Therefore, since no white noise has to be applied, he signal-to-noise ratio of the received signals is not deteriorated and a phase error can be prevented from being increased.
申请公布号 JPS62147378(A) 申请公布日期 1987.07.01
申请号 JP19850288772 申请日期 1985.12.20
申请人 NEC CORP 发明人 ISHII YASUYOSHI
分类号 G01S3/80;G01S3/808;H03D13/00 主分类号 G01S3/80
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