发明名称 LSI high-voltage timing circuit for MOS dynamic memory element
摘要 A timing circuit with a high-voltage output has a one-stage structure and is designed to immediately start charging a booster capacitor with large capacitance so that its charging is completed within the precharge period and its charges are ready to be used in the subsequent active period. This reduces the delay time and the number of circuit elements. Thus, the circuits of this invention are adapted for large scale integration and may be combined to form a data output circuit.
申请公布号 US4677313(A) 申请公布日期 1987.06.30
申请号 US19850707236 申请日期 1985.03.01
申请人 SHARP KABUSHIKI KAISHA 发明人 MIMOTO, TOSHIO
分类号 G11C11/407;G06F1/04;H03K19/017;(IPC1-7):H03K4/58;G11C11/40;H03K17/10;H03K17/687 主分类号 G11C11/407
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