发明名称 FAULT INFORMATION TRANSMISSION EQUIPMENT
摘要 PURPOSE:To send required fault information with a specific bit of a frame format through the address designation by providing a read only memory device where the fault information to be sent is written in advance. CONSTITUTION:A data pattern estimated in advance corresponding to a fault state to be sent is given to a low-order address of a read only memory device (ROM) 7. Further, a DC level change is given to a high-order address of the ROM 7 through a signal line from a fault detection section 8. Then a counter 6 gives a switching signal to a selector 4 via a decoder 5, outputs a data information input and the fault information fro the ROM 7 in time division to constitute a frame, which is sent to an opposite equipment.
申请公布号 JPS62145939(A) 申请公布日期 1987.06.30
申请号 JP19850287034 申请日期 1985.12.20
申请人 FUJITSU LTD 发明人 NARA KOICHI;KAJIWARA MASANORI;TANAKA TAKESHI;MASE HIDEKI
分类号 H04J3/14 主分类号 H04J3/14
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