| 摘要 |
At the point of time at which a segment base address is generated in current loop processing, a segment address displacement for use in the next loop processing is calculated in advance and held in one of a plurality of address registers, thereby to shorten the period of time required for address generation and to permit an overlap in the loop processing. Besides, in order to permit an overlapping in the loop processing even in a case where address registers of identical number are shared for effective utilization among different instructions, (n+1) groups of address registers are provided, and the overlapping of operations can be realized among the n successive loop processings.
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