| 摘要 |
PURPOSE:To obtain a confirmed logical output also from an input signal to be slowly changed while including noise by using an inverter having hysteresis as an initial inverter and controlling the feedback of the initial inverter. CONSTITUTION:A passing gate CMOS TRs 1, 5 are controlled by a different clock, the inverse of clock phi1, the inverse of phi1, phi2 and the inverse of phi2, one of the TRs 1, 5 is turned on when the other is off. In the shift register constituting respective stages of these TRs and inverters, an input signal is accumulated in the initial inverter 8 through the TR 1. The output of the inverter 8 is fed back through a passing gate CMOS TR 4 controlled by the phase-reversed clocks, the inverse of phi1, phi1 similarly to the inverter 3 and the TR 1. A hysteresis type inverter is used for the initial inverter 8, so that noise is not accumulated, and intermediate potential obtained when the input signal is gradually changed by compensation driving based upon feedback control is also rapidly shaped at its waveform a confirmed logical output is obtained. |
