| 摘要 |
PURPOSE:To eliminate the phenomenon of latch-up due to the presence of C- MOS elements by a method wherein, when a bi-polar transistor and a C-MOS. FET are provided in the same semiconductor substrate by coexistence, the bi-polar transistor is made completely independent not only by an isolation region of the other conductivity type formed in epitaxial layer where the transistor is formed, but also by a buried region likewise of the other conductivity type which comes into the substrate. CONSTITUTION:N<+> type buried regions 3 and 3' and a P<+> type buried region 5' are diffusion-formed in the surface layer part of the P type Si substrate 1, and an N type layer 8 is epitaxially grown over the entire surface that includes them. Next, the layer 8 is isolated by P<+> type isolation regions 6, while including the region 3. This region is used for the bi-polar element 10, and the layer 8 including the regions 3' and 5' are used for the C-MOS elements 20 and 30, respectively. At this time, the region for the formation of the element 10 is provided with the P<+> type buried region 5, coming into the substrate 1 by further surrounding the region 3, by connection to the region 6. Thus, the element 10 is made completely independent and then isolated from the elements 20 and 30 by the layer 8 and the layer 8 changed into a P type well 7. |
