发明名称 MICROPROCESSOR WITH CONCURRENT LOOP
摘要 PURPOSE:To improve the efficiency of data processing by providing a rejection flag rejecting the storage of start position of a new program when an idle area of an address storage means is filled with reservation of a program not executed. CONSTITUTION:When an instruction group of an outside processing loop is started by a programmable counter 600, an address selection signal sent from a PLA 100 via a local bus 150 is led to a window 700. When a programmable counter 650 is not in operation, the signal passes through the window 700 without modification and becomes a preset data of the counter 650, and when the counter 650 is in operation, address information is stored in an address storage area pointed out by a pointer 730, then the pointer 730 is inverted. In this case, when the address information is stored already in the address storage area pointed out by the pointer 730, the rejection flag 740 is set and the succeeding address selection signal reception is rejected.
申请公布号 JPS62145434(A) 申请公布日期 1987.06.29
申请号 JP19850288473 申请日期 1985.12.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIZUGUCHI HIROSHI;SUEHIRO KENICHI;KINUGASA NORIHIDE;OOTA YUTAKA
分类号 G06F9/46;G06F9/44 主分类号 G06F9/46
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