发明名称 DIGITAL COLOR ENCODER
摘要 PURPOSE:To attain a fine adjustment for the phase of a carrier chrominance signal with a simple circuit constitution by providing a phase switching circuit which switches the phase of a modulation operation at the modulation part of a color difference signal, and a delay circuit which adjusts the delay time of a composite color signal. CONSTITUTION:Color difference signals I and Q are supplied to a multiplexer 3 directly or through inversion circuits 1 and 2. A selection pulse generation circuit 4 generates selection pulses of four phases A-D, and a phase switching circuit 7 generates new selection pulses A'-D' replacing the order of the selection pulses A-D, and at the multiplexer 3, the I, the Q, the inverse of I, and the inverse of Q are selected, and carrier chrominance signals, the phases of which are delayed by every pi/2, are outputted. The carrier chrominance signal and a luminance signal Y are added at an adder 5, and an operating clock delayed at a clock delay circuit 9 is supplied to a D-FF10, and a digital composite color signal is delayed by tau, and is outputted as an analog composite color signal from a D/A converter 6. A micro adjustment for the phase of the carrier chrominance signal is performed by adjusting a clock delay time tau.
申请公布号 JPS62143588(A) 申请公布日期 1987.06.26
申请号 JP19850284896 申请日期 1985.12.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 WATANABE MAKOTO
分类号 H04N9/65 主分类号 H04N9/65
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