发明名称 DIGITAL DATA SIGNAL OVERLAPPING CIRCUIT
摘要 PURPOSE:To easily input a data to a sending buffer memory circuit when a part where a data signal is overlapped is expanded over all of horizontal scanning periods by counting the synchronizing signal of an input signal, and outputting a control pulse signal at every arrival of a count value at a setting value. CONSTITUTION:The output signal of a synchronizing separator circuit 2 which samples a vertical and a horizontal synchronizing signals from a television video signal from an input terminal 1 is inputted to an overlap timing pulse generation circuit 3, and at every arrival of horizontal scanning period when a data is overlapped, the pulse signal is outputted, and the data stored at a sending buffer memory circuit 7 is outputted. The data is overlapped on a signal from the terminal 1 with a data overlapping apparatus 9 through a sending signal processor 8, and is outputted as a data signal overlapped television video signal. The synchronizing signal from the circuit 2 is counted with a counter 4, and a count pulse signal is outputted, and a control pulse generation circuit 5 outputs the control pulse signal to a data input circuit 6 at a data signal overlapping time.
申请公布号 JPS62143582(A) 申请公布日期 1987.06.26
申请号 JP19850284901 申请日期 1985.12.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 UENO CHISHIO;KIRIMOTO MASAO
分类号 H04N7/08;H04N7/025;H04N7/03;H04N7/035;H04N7/081 主分类号 H04N7/08
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