| 摘要 |
PURPOSE:To reduce remarkably the level of noise that generates in the reference potential without increasing the number of external pins when making an integrated circuit by making variation of current that flows in the inductance component existing in a reference potential wiring small. CONSTITUTION:In addition to an output circuit 16 and a delay circuit 15, a CMOS invertor 19 consisting of a P channel MOS transistor 17 and an N channel MOS transistor 18 is provided. The output terminal of the CMOS invertor 19 is connected in common to the output terminal of above-mentioned output terminal 16, and an output terminal 10 as an integrated circuit is provided at this common connection point. A driving signal IN for outputting to outside of the integrated circuit as a signal corresponding to an input signal X of the output circuit 16 is supplied, and the signal IN is supplied also to the CMOS invertor 19. |
