| 摘要 |
PURPOSE:To manufacture a FET not deteriorating the gate.drain withstand voltage while easily shortening the source.gate interval by a method wherein a part of active layer is brought into contact with high impurity concentration semiconductor layers to be source regions of an FET. CONSTITUTION:A part of side and bottom of an active layer 3 (n-type semiconductor layer) is constituted to be brought into contact with high concentration semiconductor layers 4, 2 to be source regions of a field effect transistor. For example, a semiinsulating GaAs substrate 1 is implanted with Si by selective ion implanting process and heat-treatment to form the high concentration n type buried layer 2. Next the n-type semiconductor layer 3 is formed by vapor growing process and the specified region in the n-type semiconductor layer 3 is likewise implanted with ion for heat-treatment to form the high impurity n-type semiconductor layer 4. At this time, the high concentration n-type semiconductor layer 4 and the high concentration n-type buried layer 2 are partly brought into contact with each other while a part of the latter layer 2 is brought into contact with the n-type semiconductor layer 6. Later a source electrode 5, a drain electrode 6 to be brought into ohmic contact with each other by normal process and a gate electrode 7 to be brought into Schottky contact are formed. The source electrode 5 is formed into the high concentration n-type semiconductor layer 4. |
