发明名称 DIGITAL LEVEL DETECTING CIRCUIT
摘要 PURPOSE:To reduce the fluctuation of holding time by making the holding coefficient of holding time when the level of input signals is lowered to a certain value which is other than zero. CONSTITUTION:The coefficient 0 of hold response characteristic and the coefficient (k) of recovery response characteristic written in an ROM 22 are made respectively to k1 and k2 (k1, k2 are specified values other than 0). When a signal Sd is changed, the value of output of the ROM 22 becomes k1, and accordingly, if a signal V(t) is continuous in time, the signal V(t) drops gently corresponding to the value k1. Holding response operation is made at the points of time t2, t3, and attack response is made at next time of sampling t4, and the signal V(t) rises. At a point of time t5, holding response operation is made from t5, and it becomes holding response characteristic from the point of time t5 for a period tH, and thereafter, it becomes recovery characteristic.
申请公布号 JPS62142420(A) 申请公布日期 1987.06.25
申请号 JP19850283263 申请日期 1985.12.17
申请人 SONY CORP 发明人 FUKAZAWA HIDEKI
分类号 H03M1/18;H03G3/20;H03H17/00;H03H17/02;H03M1/12 主分类号 H03M1/18
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