| 摘要 |
PURPOSE:To simplify the circuit constitution after a video LPF by separating a digital FM detection output into a system processing a video signal and a system separating a synchronizing signal to set the number of bits at each system thereby setting the bit number of system less. CONSTITUTION:The number of bits (n) of an input to at least a signal separation circuit 14, that is, up to an output of a de-emphasis circuit 11 is set to a the number of bits n1 having a wide dynamic range so as to be sufficient even when a pedestal level is changed remarkably based on a non-steady-state. A pedestal level detection circuit 13 applies digital pedestal clamp to a video signal, and a data is reduced into n2 data bit at an output of an adder 12. The number of bits n2 is decided by a dynamic range required to the video signal at steady-state. The circuit design after the adder 2 and succeeding circuits is facilitated by the bit reduction.
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