| 摘要 |
<p>PURPOSE:To attain efficient information exchange between CPUs by writing information in a two-port memory of a receiving side CPU by the originating side CPU and also writing its header record in the special address area of the two-port memory. CONSTITUTION:First, a CPU1 at the originating side writes a information data 5a except a header record in the area 6a of a two-port memory 6, then writes the header record 5b in the area 6b. A CPU2 at the receiving side is provided with an interrupt generation circuit 9 which gives an interrupt signal INT to a processor in the CPU2 after receiving a detection signal of an address decoder 8 which detects that the header record storage area 6b of the two-port memory 6 is accessed from the side of a system bus 3. Therefore, when the CPU1 writes the header record 5b in the area 6b, the interrupt signal INT automatically occurs and the CPU2, upon receiving the signal, fetches information 5a and 5b in the two-port memory 6.</p> |
