| 摘要 |
PURPOSE:To detect a data fetching state by transmitting an output signal when data are extracted out of a ROM after providing an output terminal. CONSTITUTION:A processor contains a ROM 1, a RAM, etc. for storage of a program memory and performs the extraction and execution of an instruction in a single cycle. Here the program instruction of the ROM 1 is fetched by an instruction register 2 and supplied to an instruction decoder 3. Then this instruction fetched from the ROM 1 is decoded by the decoder 3 and a selector 10 selects a ROM pointer 9 if a data reading instruction is confirmed. Then an address indicating constant data is sent to the ROM 1. At the same time, a gate 6 is opened with the information output that fetched the instruction from the decoder 3 and the data corresponding to the address of the ROM 1 is sent to an internal bus 7. While said information output is also sent to a data fetching output terminal 4 for external detection of the data fetching state. |
