发明名称 TEST SYSTEM FOR INPUT/OUTPUT PROCESSOR
摘要 PURPOSE:To execute the high load test in a short time by executing the input/ output processing starting by a monitor program when the input/output processing request to the input/output device of a test object arrives at the number determined beforehand from a test program. CONSTITUTION:In the information processing system including input/output devices 101-10x connected to a main memory device 1, an arithmetic processing unit 2, an input/output processor 3 and an input/output processor the test program to test the input/output processor the test program to test the input/output device and the monitor program to control plural test programs are accommodated on the main memory device. Until the input/output processing starting request to the input/output device of the test object from plural test programs executed under the monitor program control arrives at the number specified beforehand, the execution of the input/output processing starting is reserved by the monitor program, the number of the input output processing starting request arrives at the above-mentioned number, and then, the monitor program executes the input output processing starting instantaneously. Thus, the high load test of the input/output processor can be executed in a short time.
申请公布号 JPS62138945(A) 申请公布日期 1987.06.22
申请号 JP19850279748 申请日期 1985.12.11
申请人 NEC CORP 发明人 HAKUBA TADANOBU
分类号 G06F13/00;G06F11/22 主分类号 G06F13/00
代理机构 代理人
主权项
地址