发明名称 HETEROJUNCTION BIPOLAR TRANSISTOR
摘要 PURPOSE:To reduce the current running on the parasitic junction between an emitter and a base lead-out region by a method wherein the emitter consists of a superlattice, and the heterojunction is formed with said emitter and the base lead-out region. CONSTITUTION:First, after an N-GaAs layer 1 and a P<+> GaAs layer 2 have been formed by a molecular beam epitaxial growth (MBE) method, for example, an AlxGa1-xAs/Alx, Ga1-x, As N-type superlattice 9, for example, is formed on the layer 2 by the same MBE method. Then, said superlattice 9 and the layer 2 are subjected to disordering using ion-implanting or diffusing the P-type impurities such as Zn and the like on the prescribed part of the superlattice 9 and the layer 2, and a base lead-out region 5 consisting of P<+>AlyGa1-yAs in bulk is formed. Subsequently, an emitter electrode 4 and a base electrode 6 are formed on the superlattice 9 and the region 5 respectively. The compositional ratio of Al in the P<+>AlyGa1-yAs with which the region 5 is constituted is indicated by the formula separately mentioned.
申请公布号 JPS62137868(A) 申请公布日期 1987.06.20
申请号 JP19850280001 申请日期 1985.12.12
申请人 SONY CORP 发明人 TAIRA KENICHI
分类号 H01L29/73;H01L21/331;H01L29/20;H01L29/72;H01L29/737 主分类号 H01L29/73
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