| 摘要 |
PURPOSE:To secure the effective application of a memory area that is not used conventionally by attaining the mutual exchange between a counter which indicates the rows of a matrix type memory cell and a counter which indicates the columns of said memory cell respectively. CONSTITUTION:A switch circuit 28 connects the output of a basic length detecting circuit 18 to the output side when the output of a final row read detecting circuit 24 has a low logic level and then connects the output of a postamble read detecting circuit 20 to the output side when the output of the circuit 24 has a high logic level. The output of the circuit 28 is connected to the input at one side of the 1st OR gate 30 as well as to the input at one side of the 2nd OR gate 32. Then the output of the gate 30 is connected to the clear terminal of a binary counter 12 of 6 bits. While the output of the gate 32 is connected to the clock enable terminal of a binary counter 22 of 8 bits.
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