发明名称 CHECKING SYSTEM FOR TIMING SIGNAL
摘要 PURPOSE:To check the titled timing signal in a no-operation time by providing a register which shifts an operation command at the timing of a machine cycle and generating a NP timing check signal when the register is not busy. CONSTITUTION:A timing circuit 110 generates timing signals related to reading and writing operations, etc. based on an operation command CMD. A command shift register circuit 120 shifts successively the input state of the command CMD at each shift stage. A busy checking circuit 130 generates the NP timing check signal which checks the timing signals related to the no-operation when the circuit 120 is not busy. A timing check circuit 140 checks the timing signal related to the no-operation when the NP timing signal is received.
申请公布号 JPS62137791(A) 申请公布日期 1987.06.20
申请号 JP19850277430 申请日期 1985.12.10
申请人 FUJITSU LTD 发明人 MIWATA KATSUMI;ITO SHUJI
分类号 G06F12/00;G06F12/06;G06F12/16;G11C7/00 主分类号 G06F12/00
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