发明名称 CONTROLLING SYSTEM FOR DUPLICATED BUS
摘要 PURPOSE:To prevent increase of time for data transfer in a duplicated bus controlling system of A system and B system, by providing A system and B system data transferring circuit connected to the body of a card and A system and B system buses and a changeover switch that switches the body of the card to A system and B system transferring circuits in each card. CONSTITUTION:Read signals inputted from a signal line 10 by the A system data transferring circuit 3 of a microprocessor card 101 and address signals inputted from a signal line 14 are transferred respectively to an A system data transferring circuit 3' and a B system data transferring circuit 4' through signal lines 21 and 25 of an A system common bus 27, and through signal lines 31 and 35 of a B system common bus 37 by a B system data transferring circuit 4, and sent to a memory 5. When data signals read out from the memory 5 and transferred to the transferring circuit 3 are normal, they are given to a microprocessor 1.
申请公布号 JPS62137654(A) 申请公布日期 1987.06.20
申请号 JP19850277724 申请日期 1985.12.10
申请人 FUJI ELECTRIC CO LTD;FUJI FACOM CORP 发明人 TAKEI TAKANORI
分类号 G06F13/00;G06F11/18;G06F13/20;G06F13/36 主分类号 G06F13/00
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